1. Field of the Invention
The invention relates generally to digital communications system, including UHF satellite communications to mobile terminals, such as aircraft, ground terminals, etc.; to hardwired data communications between data processing equipment connected by land lines, and to any other communications link susceptable to the effects of noise, fading, bit-shift or any other interference which could result in synchronization errors, extraneous transitions and data errors.
More particularly, the invention relates to a digital modulation/encoding system and method for overcoming the deleterious effects of ionospheric scintillation in satellite communications systems to permit reliable digital communications in the up-link signal to the satellite and the down-link signal from the satellite, notwithstanding the deep signal fades which such disturbances can produce, which heretofore could render a UHF satellite communications link inoperative.
The invention also relates to a modulator/demodulator (modem) for operating over communication links disturbed as aforementioned; having a rapid synchronization acquisition time without lessened bit-error-rate (BER) performance; having the capability to correct "burst" errors, or sudden extraneous noise spikes, caused by fading; and having the capability of deriving and maintaining a highly stable clock, even during fading, for preventing data bit-shifts or other errors in timing and data decoding.
The invention also relates to apparatus and method for generating digital timing signals and for preventing bit-shifts as small as a single bit in communications channels, even when incoming noise or other channel disruptions cause a loss of signal for time durations of as great as three (3) seconds or more.
2. Description of the Prior Art
Digital data communications systems, whether hardwired or UHF satellite links require timing, or synchronization signals that are continuously synchronized with incoming asynchronous data, which data is in the form of binary bits, each bit occurring within a bit "cell" or period, and being encoded with transitions within the bit cell in accordance with any of a number of well known encoding schemes. In reading, or decoding such digital data, for example, NRZ-1 data wherein transitions occur from one binary state to another whenever a digital "ONE" is encoded, it is desirable that decoding occur by sampling the data transition at or near the center of the "bit cell", or "bit", which is used interchangeably herein. Thus, system timing should occur near the center of the bit, whether or not a transition occurs in any particular bit cell, and bit-shift from the bit center is indicative of phase error. Additionally, timing must be maintained under conditions of signal loss or fade, which is difficult or impossible in systems utilizing the incoming signal transition to generate the system timing under such conditions.
Many bit-timing recovery schemes have been devised in the prior art for regenerating and decoding discrete data, which may be modulated in any number of forms, such as phase shift keyed (PSK) or frequency shift keyed (FSK), wherein the information desired to be transmitted is modulated onto a carrier of a given frequency by effecting predetermined phase shifts (PSK) or frequency shifts (FSK) as the case may be, in the carrier corresponding to the information to be transmitted. A PSK signal thus is of a particular frequency with portions at some arbitrary zero phase and other portions differing in phase from the zero phase portion. A common decoding technique is the phase locked loop (PLL), either analog or digital, wherein the decoder timing is continuously adjusted to "follow" variations in incoming bit-shift, i.e., phase displacement. Such systems are generally unsatisfactory for decoding asynchronous data or for decoding data in systems experiencing signal loss for multi-bit time durations since the acquisition time, or locking to the data bit stream once resumed consumes time during which decoding does not occur, resulting in loss of data.
One such digital phase locked loop of the prior art is described by U.S. Pat. No. 3,509,471 wherein a bit timing recovery circuit produces a local pulse stream synchronized to transitions in the incoming data. Another phase locked loop decoder for decoding a double frequency encoded data signal, i.e., data bits are interleaved between clock pulses, is disclosed by U.S. Pat. No. 3,825,844. In this prior art decoder, "windows", or predetermined time periods are derived for decoding data. When the data occurs outside of the window, it is not decoded.
A computer clock phase lock for restarting a computer with all clocking circuits operating in a known relationship is described by U.S. Pat. No. 3,245,048 wherein a plurality of clock signals cause the computer to cycle when stopped at such known phase relationship.
U.S. Pat. No. 3,739,277 discloses a differentially coherent phase shift keyed digital transmission system (DPSK) having digit groups of data controlling the phase shift modulation. After several cycles of carrier are transmitted, the phase is shifted for the next group of digits. For each three-cycle segment of carrier, the number of phase matches is counted to determine the phase of the received signal on the basis of the occurrence of plural matches.
It is to be understood that the present invention, while relating to an apparatus and method of extracting bit-timing from a disturbed communication channel, is also applicable to extracting bit-timing from non-disturbed transmission channels, such as telephone lines. Also, the particular encoding scheme utilized, whether RZ, NRZ, NRZ-1, phase-encoding (Manchester), frequency encoding, (Harvard), etc. is not critical to the present invention, as the timing technique described herein is useful in decoding any of the above exemplary digital codes. Further, the present invention, while described in the context of an FSK-UHF satellite communication system, is not limited to any particular modulation scheme, and is applicable to PSK, DPSK and other known modulation techniques.